Part Number Hot Search : 
MAU108 TO220 TC553002 TC143Z HM9270D SST213 KP501010 DTA12
Product Description
Full Text Search
 

To Download IS61LV6416 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 IS61LV6416
FEATURES
64K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
High-speed access time: 8, 10, 12, and 15 ns CMOS low power operation 250 mW (typical) operating 250 W (typical) standby TTL compatible interface levels Single 3.3V power supply Fully static operation: no clock or refresh required Three state outputs Data control for upper and lower bytes Industrial temperature available
DESCRIPTION The 1+51 IS61LV6416 is a high-speed, 1,048,576-bit static
RAM organized as 65,536 words by 16 bits. It is fabricated using 1+51's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with low power consumption.
When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS61LV6416 is packaged in the JEDEC standard 44-pin 400mil SOJ, 44-pin 400mil TSOP-2, and 48-pin 6*8mm TFBGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A15
DECODER
64K x 16 MEMORY ARRAY
VCC GND I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte I/O DATA CIRCUIT
COLUMN I/O
CE OE WE UB LB CONTROL CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. (c) Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
SR013-0C
1
IS61LV6416
PIN CONFIGURATIONS
44-Pin SOJ
A15 A14 A13 A12 A11 CE I/O0 I/O1 I/O2 I/O3 Vcc GND I/O4 I/O5 I/O6 I/O7 WE A10 A9 A8 A7 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A0 A1 A2 OE UB LB I/O15 I/O14 I/O13 I/O12 GND Vcc I/O11 I/O10 I/O9 I/O8 NC A3 A4 A5 A6 NC
44-Pin TSOP-2
A15 A14 A13 A12 A11 CE I/O0 I/O1 I/O2 I/O3 Vcc GND I/O4 I/O5 I/O6 I/O7 WE A10 A9 A8 A7 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A0 A1 A2 OE UB LB I/O15 I/O14 I/O13 I/O12 GND Vcc I/O11 I/O10 I/O9 I/O8 NC A3 A4 A5 A6 NC
48-Pin 6x8mm TF-BGA
1 A B C D E F G H
LB I/O0 I/O1 GND Vcc I/O5 I/O7 NC
PIN DESCRIPTIONS
5
A6 CE I/O13 I/O12 I/O11 I/O10 WE A15
2
OE UB I/O2 I/O3 I/O4 I/O6 NC A12
3
A3 A2 A0 NC NC A9 A11 A13
4
A7 A1 A4 A5 NC A8 A10 A14
6
N/C I/O15 I/O14 Vcc GND I/O9 I/O8 NC
A0-A15 I/O0-I/O15 CE OE WE LB UB NC Vcc GND
Address Inputs Data Inputs/Outputs Chip Enable Input Output Enable Input Write Enable Input Lower-byte Control (I/O0-I/O7) Upper-byte Control (I/O8-I/O15) No Connection Power Ground
TRUTH TABLE
Mode Not Selected Output Disabled Read WE X H X H H H L L L CE H L L L L L L L L OE X H X L L L X X X LB X X H L H L L H L UB X X H H L L H L L I/O PIN I/O0-I/O7 I/O8-I/O15 High-Z High-Z High-Z DOUT High-Z DOUT DIN High-Z DIN High-Z High-Z High-Z High-Z DOUT DOUT High-Z DIN DIN Vcc Current ISB, ISB ICC ICC
Write
ICC
2
Integrated Circuit Solution Inc.
SR013-0C
IS61LV6416
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM TSTG PT IOUT Parameter Terminal Voltage with Respect to GND Storage Temperature Power Dissipation DC Output Current (LOW) Value 0.5 to Vcc+0.5 65 to +150 1.5 20 Unit V C W mA
Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
OPERATING RANGE
Range Commercial Industrial Ambient Temperature 0C to +70C 40C to +85C Vcc 3.3V 10% 3.3V 10%
! "
Min. 2.4 2 0.3 Max. 0.4 VCC + 0.3 0.8 2 5 2 5 Unit V V V V A A
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol VOH VOL VIH VIL ILI ILO Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage(1) GND VIN VCC GND VOUT VCC, Outputs Disabled Com. Ind. Com. Ind. Input Leakage Output Leakage Test Conditions VCC = Min., IOH = 4.0 mA VCC = Min., IOL = 8.0 mA
# $ % & '
2 -5 2 -5
Notes: 1. VIL (min.) = 2.0V for pulse width less than 10 ns. 2. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol ICC ISB Parameter Vcc Dynamic Operating Supply Current TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) Test Conditions VCC = Max., IOUT = 0 mA, f = fMAX VCC = Max., VIN = VIH or VIL CE VIH , f = 0 VCC = Max., CE VCC 0.2V, VIN VCC 0.2V, or VIN 0.2V, f = 0 Com. Ind. Com. Ind. Com. Ind. -8 ns Min. Max. 220 230 30 40 10 15 -10 ns Min. Max. 200 210 30 40 10 15 -12 ns Min. Max. 180 190 30 40 10 15 -15 ns Min. Max. 180 190 30 40 10 15 Unit mA mA

3
ISB
mA
Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Circuit Solution Inc.
SR013-0C
IS61LV6416
CAPACITANCE(1)
Symbol CIN COUT Parameter Input Capacitance Input/Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 8 Unit pF pF
Note: 1. Tested initially and after any design or process changes that may affect these parameters.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter Read Cycle Time Address Access Time Output Hold Time CE Access Time OE Access Time
Min. 8 3 0 0 0 3 0 0
-8
Max. 8 8 4 4 4 4 4
-10 Min. Max. 10 3 0 0 3 0 0 10 10 5 5 5 5 5
-12 Min. Max. 12 3 0 0 3 0 0 12 12 6 6 6 6 6
-15 Min. Max. 15 3 0 0 0 3 0 0 15 15 7 6 6 7 6
Unit ns ns ns ns ns ns ns ns ns ns ns ns
tRC tAA tOHA tACE tDOE tHZOE
OE to High-Z Output CE to High-Z Output CE to Low-Z Output LB, UB Access Time LB, UB to High-Z Output LB, UB to Low-Z Output
tLZOE OE to Low-Z Output tHZCE tLZCE tBA tHZB tLZB
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 3. Not 100% tested.
AC TEST CONDITIONS
Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1a and 1b
Notes: 1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
AC TEST LOADS
319 3.3V
3.3V
319
OUTPUT 30 pF Including jig and scope 353
OUTPUT 5 pF Including jig and scope 353
Figure 1a. 4
Figure 1b. Integrated Circuit Solution Inc.
SR013-0C
IS61LV6416
AC WAVEFORMS READ CYCLE NO. 1(1,2) (Address Controlled) (CS = OE = VIL, UB or LB = VIL)
t RC
ADDRESS
t AA t OHA
DOUT
PREVIOUS DATA VALID
t OHA
DATA VALID
! "
READ CYCLE NO. 2(1,3)
tRC
ADDRESS
tAA tOHA
# $ %
tHZCE tHZB
DATA VALID
OE
tDOE tHZOE
CE
tLZCE
tLZOE tACE
LB, UB
tBA tLZB
& '
DOUT
HIGH-Z
Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE, UB, or LB = VIL. 3. Address is valid prior to or coincident with CE LOW transition.
Integrated Circuit Solution Inc.
SR013-0C
5
IS61LV6416
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
Symbol Parameter Write Cycle Time CE to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time LB, UB Valid to End of Write WE Pulse Width Data Setup to Write End Data Hold from Write End
Min. 8 7 7 0 0 7 7 4.5 0 3
-8
Max. 4
-10 Min. Max. 10 8 8 0 0 8 8 5 0 3 5
-12 Min. Max. 12 9 9 0 0 9 9 6 0 3 6
-15 Min. Max. 15 10 10 0 0 10 10 7 0 3 7
Unit ns ns ns ns ns ns ns ns ns ns ns
tWC tSCE tAW tHA tSA tPWB tPWE tSD tHD tHZWE
WE LOW to High-Z Output
tLZWE WE HIGH to Low-Z Output
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.
6
Integrated Circuit Solution Inc.
SR013-0C
IS61LV6416
AC WAVEFORMS WRITE CYCLE NO. 1 (WE Controlled)(1,2) WE
tWC
ADDRESS
tSCE tHA
CE
tPWB
! "
LB, UB
tAW tPWE
WE
tSA
# $
tHD
WRITE(1)
tSD
DIN
tHZWE tLZWE
UNDEFINED HIGH-Z UNDEFINED HIGH-Z
% & '
DOUT
Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least one of the LB and UB inputs being in the LOW state. 2. WRITE = (CE) [ (LB) = (UB) ] (WE).
Integrated Circuit Solution Inc.
SR013-0C
7
IS61LV6416
ORDERING INFORMATION Commercial Range: 0C to +70C
Speed (ns) 8 8 8 10 10 10 12 12 12 15 15 15 Order Part No. IS61LV6416-8B IS61LV6416-8T IS61LV6416-8K IS61LV6416-10B IS61LV6416-10T IS61LV6416-10K IS61LV6416-12B IS61LV6416-12T IS61LV6416-12K IS61LV6416-15B IS61LV6416-15T IS61LV6416-15K Package 6*8mm TF-BGA 400mil TSOP-2 400mil SOJ 6*8mm TF-BGA 400mil TSOP-2 400mil SOJ 6*8mm TF-BGA 400mil TSOP-2 400mil SOJ 6*8mm TF-BGA 400mil TSOP-2 400mil SOJ
ORDERING INFORMATION Industrial Range: 40C to +85C
Speed (ns) 8 8 8 10 10 10 12 12 12 15 15 15 Order Part No. IS61LV6416-8BI IS61LV6416-8TI IS61LV6416-8KI IS61LV6416-10BI IS61LV6416-10TI IS61LV6416-10KI IS61LV6416-12BI IS61LV6416-12TI IS61LV6416-12KI IS61LV6416-15BI IS61LV6416-15TI IS61LV6416-15KI Package 6*8mm TF-BGA 400mil TSOP-2 400mil SOJ 6*8mm TF-BGA 400mil TSOP-2 400mil SOJ 6*8mm TF-BGA 400mil TSOP-2 400mil SOJ 6*8mm TF-BGA 400mil TSOP-2 400mil SOJ
HEADQUARTER: NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, TAIWAN, R.O.C. TEL: 886-3-5780333 Fax: 886-3-5783000
Integrated Circuit Solution Inc.
BRANCH OFFICE: 7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD, HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C. TEL: 886-2-26962140 FAX: 886-2-26962252 http://www.icsi.com.tw
8 Integrated Circuit Solution Inc.
SR013-0C


▲Up To Search▲   

 
Price & Availability of IS61LV6416

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X